TSMC Q3 2026 Results: N2 Reaches 8% as HPC Leads Advanced-Node Demand
TSMC reported third-quarter 2026 revenue of NT$1,494.24 billion, up 50.9% year over year and 17.6% sequentially, with net income of NT$763.06 billion. N2 entered the wafer-revenue mix at 8%, while N3, N5 and N7 brought the combined advanced-node share to 79%. HPC represented 68% of net revenue and increased 22% quarter over quarter. Fourth-quarter guidance places revenue at US$52.3 billion to US$54.3 billion, with gross margin of 65% to 67%.
A quarter defined by scale and mix
TSMC announced its third-quarter 2026 results on October 15. Revenue reached NT$1,494.24 billion, an increase of 50.9% from the same quarter a year earlier and 17.6% from the preceding quarter. In U.S. dollar terms, revenue was US$46.72 billion. Net income was NT$763.06 billion.
The growth rates establish the scale of the quarter, but the composition of revenue provides the more useful foundry signal. The reported mix places N2 at 8% alongside a still substantial concentration in N3 and N5. It also shows that high-performance computing remained the dominant platform during a period of sequential expansion across the disclosed end markets.
These figures describe recognized revenue and platform composition for the quarter. They do not, by themselves, establish customer-level wafer volumes, product-level demand, process availability, pricing or lead times. The results are therefore most useful as a reference for the direction of advanced-node adoption and platform concentration.
N2 enters the reported wafer-revenue mix
N2 accounted for 8% of third-quarter wafer revenue. N3 contributed 33%, N5 contributed 28%, and N7 contributed 10%. Together, advanced processes represented 79% of wafer revenue.
The node distribution matters because it places N2 within an operating revenue mix rather than only within a future roadmap. At the same time, the 8% contribution remains an early-ramp reading. N3 and N5 remained the two largest disclosed node shares in the process mix.
The reported percentages also set clear analytical boundaries. A revenue share is not a direct measure of wafer starts, unit output or installed capacity. Different process nodes can carry different product and commercial profiles. The figures show that advanced nodes formed the majority of wafer revenue, but they do not support a conversion from revenue share to physical supply.
Initial N2 ramp visible in gross margin
Gross margin was 66.4% in the third quarter. TSMC stated that the sequential decline of 1.3 percentage points was mainly attributable to the initial N2 ramp.
This linkage gives the N2 contribution a second dimension. The new node entered the revenue mix at 8%, while its initial ramp was also visible in quarter-to-quarter gross-margin movement. The two disclosures belong together: the revenue contribution places N2 in the reported mix, and the margin explanation identifies the process as being in an initial ramp phase.
The 66.4% gross margin remained a consolidated company measure. It does not disclose an N2-specific margin, customer economics or process-level pricing. The 1.3-percentage-point sequential change remains tied to the company's stated explanation and does not provide a standalone estimate of N2 profitability.
HPC remains the principal platform
HPC represented 68% of third-quarter net revenue, while smartphones represented 21%. On a sequential basis, HPC increased 22%, smartphones increased 10%, IoT increased 5%, and automotive increased 23%.
The mix and growth rates show two related conditions. First, HPC was the largest disclosed platform by a wide margin. Second, sequential growth was not confined to a single platform. Automotive posted the highest disclosed sequential growth rate at 23%, narrowly above HPC at 22%, while smartphones and IoT also expanded.
For the foundry market, the important distinction is between share and growth. HPC's 68% share describes its weight in quarterly net revenue. The 22% sequential increase describes its movement from the prior quarter. Automotive's 23% growth rate does not imply a net-revenue share comparable with HPC, because the disclosed facts provide a growth rate rather than the same revenue weight. Keeping those measures separate prevents a high growth rate from being mistaken for the largest revenue base.
The platform data does not identify individual customers, processors or end systems. It supports a broad conclusion that HPC led the revenue structure, while the underlying customer and product allocation remains outside the reported platform percentages.
Profitability alongside advanced-node expansion
Net income of NT$763.06 billion and gross margin of 66.4% place the process and platform data within a profitable operating quarter. The result is notable because the N2 initial ramp affected sequential gross margin at the same time that advanced nodes reached 79% of wafer revenue.
This combination is more informative than either measure in isolation. The advanced-node share shows where the wafer-revenue mix was concentrated. The gross-margin explanation identifies a specific transition cost within that mix. Net income records the overall earnings outcome without assigning profitability to an individual node or platform.
No process-specific earnings figure can be derived from the disclosed totals. N2's revenue share, the advanced-node aggregate and the consolidated margin remain separate measures in any foundry-market interpretation.
Fourth-quarter operating range
TSMC guided fourth-quarter revenue to US$52.3 billion to US$54.3 billion. Gross margin is expected to be 65% to 67%, and operating margin is expected to be 56.5% to 58.5%.
The guidance extends the third-quarter picture into a defined financial range. It provides a company-level revenue and margin framework rather than a node-level forecast. The ranges do not allocate expected revenue among N2, N3, N5 or N7, and they do not divide the outlook among HPC, smartphones, IoT and automotive.
That distinction is relevant for supply-chain interpretation. A higher company revenue range does not automatically specify which qualified products, process variants or customer programs account for the expected change. Similarly, the guided margin ranges do not establish the economics of a particular node. They frame the next quarter at the consolidated level.
Foundry-market reading
The third-quarter disclosures establish three central signals. N2 became a visible part of wafer revenue at 8%. Advanced nodes collectively reached 79%, led by N3 and N5. HPC represented 68% of net revenue and increased 22% sequentially, making it both the largest platform and a major source of quarter-to-quarter expansion.
The margin data adds an important constraint to that growth narrative. N2's initial ramp was the main reason for the 1.3-percentage-point sequential decline in gross margin. The process transition was therefore visible in both revenue composition and consolidated profitability.
For foundry customers, OEMs and semiconductor procurement teams, the report provides a high-level benchmark for advanced-node adoption and platform concentration. It does not replace program-specific evidence on qualification, allocation, wafer volume, price or delivery. The most defensible conclusion is that N2 entered the reported wafer-revenue mix at 8% while HPC continued to shape the leading-edge demand mix, with the financial effects of the ramp visible in the reported margins.